Is 3D NAND Limited to Stacking?

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Savings News May 5, 2025

NAND development seems to be caught in a peculiar loop, as once-thriving sectors encounter new challenges on the horizonThe world of NAND flash memory has witnessed slowdowns and recoveries alike, akin to the tumultuous phases seen in other tech industriesRecently, Kioxia, formerly known as Toshiba Memory, announced some promising newsWith the bounce-back of the storage market, they have ceased their production reduction strategies for NAND flashCurrently, their production lines in Yokkaichi, Mie Prefecture, and Kitakami, Iwate Prefecture, report a capacity utilization rate of 100%.

The results speak volumes; after six consecutive quarters of losses, Kioxia returned to profitability in the last quarter with a remarkable 10.3 billion yen profitThis turnaround was buoyed by a new agreement from a consortium of three banks to refinance Kioxia's maturing debts amounting to 540 billion yen, alongside extending a new credit line of 210 billion yenThese movements indicate a cautiously optimistic restart for Kioxia and potentially the wider NAND sector.

Other manufacturers are also ramping up to the previously reduced NAND production levelsFor instance, Samsung has increased its NAND flash production capacity back to approximately 70%. Concurrently, SK Hynix has stepped up its manufacturing of high-capacity NAND products, particularly the much in-demand high-capacity eSSDMoreover, Western Digital is pushing its production utilization rate closer to 90%. These collective efforts to regain lost ground exemplify an industry on the mend; however, concerns linger about whether the recovery is sustainable.

Despite these indicators of growth, experts warn that another harsh winter may loom over the NAND marketThere is speculation that the rapid increase in production may eventually outstrip market demand, suppressing any potential rise in NAND flash pricesGong Yang-nong, an economist at the Korea Institute for Industrial Economics and Trade, expressed concerns by stating that “other than the high-capacity NAND used in AI data centers, it’s hard to say that the entire NAND market is recovering

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A sudden spike in production might drive down costs, impacting prolonged price increases.”

This pronouncement implies a year ahead filled with uncertainties for the NAND market, casting shadows over expectations for a swift recovery akin to that of DRAMTechnological challenges remain a more pressing issue—what is the next frontier for 3D NAND? Historically, the first decade of the 21st century mirrored the storied evolution of DRAM, riding the coattails of Moore's LawEnhanced lithography techniques consistently minimized transistor sizes, driving improvements in storage density and performance.

However, after 2010, this trajectory hit a plateauThe mass production of EUV (Extreme Ultraviolet Lithography) technology progressed slower than expected, with DUV (Deep Ultraviolet) reaching its limitsAlternatives like multi-patterning techniques became cost-prohibitive and offered low yield rates, a dilemma traditional NAND manufacturers could not acceptThis impasse paved the way for 3D NAND technologies to emerge as the industry's new growth channel.

Unlike conventional 2D NAND, which employs planar designs, 3D NAND integrates multiple layers of memory cells stacked verticallyThis innovation can involve hundreds of layers, significantly increasing storage capacity compared to its predecessorsToday, 3D NAND continues to drive the evolution of the market, yet discussions surrounding its future trajectory persist robustly within the industryOngoing innovation is vital as different companies explore various alternatives to sustain this momentum, especially as industry experts continually debate the future of NAND technology.

During the International Solid-State Circuits Conference (ISSCC) in 2004, Jagdish Pathak from Sub-Micron Circuits articulated the need for continued research in scaling flash memory technology beyond 2010. “90-nanometer flash has already been put into production, and there is controversy at the 65-nanometer scale

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Some believe scaling is possible; others are skepticalApproaching 45-nanometers, floating gate structures will face significant scaling challengesThere are lots of hurdles ahead,” he stated.

As the discourse continued, several companies charted their paths forwardDrKim Ki-Nam from Samsung's memory division proposed using chalcogenide-based methods, such as PCRAM and PRAM, emphasizing superior scalability within their frameworksMeanwhile, Hitachi’s Tomoyuki Ishii explored NanoCrystal storage, a methodology deriving from single-electron storage techniques.

However, as time progressed, the NAND flash industry collectively abandoned traditional scaling methodsThe first commercial 3D NAND products emerged in 2013, boasting 24-layer arrays and varying names such as V-NAND and BICS based on different manufacturers' implementationsThis marked a significant turning point as 3D NAND technology became the first serious venture into true three-dimensional memory storage solutions.

Over two decades, innovation has surged as manufacturers have sought to enhance storage densities through more advanced 3D processesSome have increased individual cell bit counts to four, leveraging multi-cell structures to capitalize on broader storage windowsThis advancement establishes 3D NAND's key competitive advantage in the market.

An equally significant development was replacing floating gate cells with charge trap cells, leading to a more streamlined processWhile both cell types function similarly, charge trap cells use an insulating capture layer—commonly silicon nitride—which mitigates electrostatic interference between adjacent unitsNow, most 3D NAND architectures are based on this innovation.

Interestingly, many NAND manufacturers find themselves engaged in stacking operationsSeveral companies have embarked on pushing past the 200-layer benchmark, reflecting an unwavering commitment to staying at the forefront of 3D NAND technologies

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Samsung has established itself as a leader in 3D NAND innovation, rolling out the V8 generation featuring a stunning 236-layer 1TB TLC product, demonstrating their continuous commitment to pushing technological boundaries.

Kioxia and Western Digital have maintained the BiCS structure focus, striving to enhance layer counts with the announcement of eighth-generation BiCS products featuring 218-layer configurations, with plans for successors featuring up to 284 layersMicron’s pivot towards CTF CuA integration has led to the launch of their 176-layer and 232-layer products, signaling a stronghold in advancing the marketNot to be outdone, SK Hynix is ramping up production with plans for 238-layer V8 4D PUC offerings aimed at larger-scale advancements set to eclipse towards 370 or 380 layers.

Yangtze Memory Technologies Co. (YMTC) recently made substantial progress with its Xtacking structure, achieving a leap from 176 to 232 layers, boldly honing efforts despite facing chip bansThey aim to develop more advanced QLC devices while exploring multi-Xtacking technologiesOn the other end of the spectrum, Macronix has entered the market with their first-generation 3D NAND chip, featuring 96 layers geared toward products like the Nintendo Switch.

Amid these innovations, some manufacturers are even aiming higher—literallyKioxia has affirmed that with a growth rate of 1.33 times per year, 3D NAND could potentially reach 1,000 layers by 2027. Meanwhile, Samsung anticipates surpassing the threshold of 1,000 layers by roughly 2030, a clear indication of future aspirations.

As 3D NAND matures, stacked layers and overall density have become the primary focus, with newer technologies like QLC starting to dominate the landscape due to their ability to facilitate greater capacities at lower costsNevertheless, challenges persist as QLC NAND often struggles to cope with high workloads, influencing its overall performance and longevity when compared to TLC NAND, which remains more resilient.

Despite the leaps forward in NAND technology, its inherent limitations pose ongoing challenges, particularly in terms of write speeds that inhibit reaching DRAM-like performance

These delays stem from fundamental quantum mechanics differences, glaringly evident as flash memory write speeds hover around milliseconds, while DRAM operates on a mere nanosecond scaleThis fundamental gap indicates that NAND flash memory may not entirely bridge the void.

However, with the rise of AI, a new optimistic chapter may unfold for NANDAI has not only fueled growth in sectors like HBM within the DRAM market, but it has also begun to cast a ray of hope for NAND manufacturersA report by market research firm Omdia revealed that QLC NAND market volumes are expected to rise by an impressive 85% year-on-year, increasing its market share from 12.9% last year to approximately 20.7% in 2023. By 2027, this share could climb to 46.4%, essentially doubling within three years.

The ramp-up in QLC NAND effectively coincides with the demand pulses triggered by major technology firms deploying generative AI within their server infrastructuresThe promising speed and reduced power consumption inherent to SSDs over traditional HDDs align effectively with modern data requirements, prompting NAND manufacturers to adapt quickly and capitalize on this emerging trend.

Even as QLC NAND enjoys its moment in the sun, persistence of challenges remains, particularly in high-read workload scenarios where longevity and performance are impactedInterestingly, the shift driven by AI offers a potential solution for some of these vexing issues, particularly in optimizing NAND lifecycle managementCompanies like Microchip Technology have already embedded machine learning capabilities within their flash controllers to extend the life and reliability of NAND memory.

Ranya Daas from Microchip’s Data Center Solutions Division expressed optimism about this trend, noting efforts to help NAND units train toward experienced reads, thereby minimizing errors and adaptation times. “You begin by knowing exactly which reference voltage to target during reads,” she explained, highlighting the potential of this AI-driven optimization.

Additionally, SSD manufacturer Phison Electronics also exploits AI's capabilities to enhance drive performance

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